The researchers who designed the transistor, led by Walter M. Weber at Namlab gGmbH in Dresden, Germany, have published the new concept in a recent issue of Nano Letters.
“Synthetic nanowires are used to realize the proof-of-principle,” Weber told PhysOrg.com. “However, the concept is fully transferable to state-of-the-art CMOS silicon technology and can make use of self-aligned processes.”
The new transistor’s core consists of a single nanowire made of a metal-semiconductor-metal structure, which is embedded in a silicon dioxide shell. Electrons or holes flow from the source at one end of the nanowire through two gates to the drain at the other end of the nanowire. The two gates control the flow of electrons or holes in different ways. One gate selects the transistor type by choosing to use either electrons or holes, while the other gate controls the electrons or holes by tuning the nanowire’s conductance.
Using a gate to select p- or n-type configuration is quite different from conventional transistors. In conventional transistors, p- or n-type operation results from doping that occurs during the fabrication process, and cannot be changed once the transistor is made. In contrast, the reconfigurable transistor doesn’t use any doping. Instead, an external voltage applied to one gate can reconfigure the transistor type even during operation. The voltage causes the Schottky junction near the gate to block either electrons or holes from flowing through the device. So if electrons are blocked, holes can flow and the transistor is p-type. By applying a slightly different voltage, the reconfiguration can be switched again, without interfering with the flow.